response speed #01

More recently, several significant advantages over static logic circuits have been realized by the development of logic circuit designs which are highly asymmetrical in response to both input voltage levels and response speed. The basic theory of the response speed improvement in such devices is that propagation time of a logic element will be minimized if the circuit can be brought to a logic state from which it may rapidly be switched to another logic state before data is applied to it.

This results in excessive power consumption which may, in turn, affect response speed or pull voltage levels away from the intended logic states.

It should also be understood that, at the present state of the art, substantial design effort may be expended to obtain a seemingly small percentage increase in response speed.

This form of gate circuit also utilizes precharged logic for high response speed and is self-resetting.

It is also seen that the invention provides a memory using precharged circuits having asymmetrical response speed and noise immunity and capable of directly driving both precharged and static types of logic.

US Pat. 5481500